Improvements to the functionality of modern Noisy Intermediate-Scale Quantum (NISQ) computers have coincided with an increase in the total number of physical qubits. Quantum programmers do not commonly design circuits that directly utilize these qubits; instead, they rely on various software suites to algorithmically transpile the circuit into one compatible with a target machine’s architecture. For connectivity-constrained superconducting architectures in particular, the chosen syntheses, layout, and routing algorithms used to transpile a circuit drastically change the average utilization patterns of physical qubits. In this paper, we analyze average qubit utilization of a quantum hardware as a means to identify how various transpiler configurations change utilization patterns. We present the preliminary results of this analysis using IBM’s 27-qubit Falcon R4 architecture on the Qiskit platform for a subset of qubits, gate distributions, and optimization configurations. We found a persistent bias towards trivial mapping, which can be addressed through increased optimization provided that the overall utilization of an architecture remains below a certain threshold. As a result, some qubits are overused whereas other remain underused. The implication of our study are many-fold namely, (a) potential reduction in calibration overhead by focusing on overused qubits, (b) refining optimization, mapping and routing algorithms to maximize the hardware utilization and © pricing underused qubits at low rate to motivate their usage and improve hardware throughput (applicable in multi-tenant environments).

生成讲解博客的中文版本

生成AI智能校验的中文版本