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We construct a double-toric surface code by exploiting the planar tessellation using a rhombus-shaped tile. With n data qubits, we are able to encode at least n/3 logical qubits or quantum memories. By a suitable arrangement of the tiles, the code achieves larger distances, leading to significant error-correcting capability. We demonstrate the robustness of the logical qubits thus obtained in the presence of external noise. We believe that the optimality of the code presented here will pave the way for design of efficient scalable architectures.

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