In view of the appreciable semiconducting gap of 0.26 eV observed in recent experiments, epitaxial graphene on a SiC substrate seems a promising channel material for FETs. Indeed, it is two-dimensional - and therefore does not require prohibitive lithography - and exhibits a wider gap than other alternative options, such as bilayer graphene. Here we propose a model and assess the achievable performance of a nanoscale FET based on epitaxial graphene on SiC, conducting an exploration of the design parameter space. We show that the current can be modulated by 4 orders of magnitude; for digital applications an Ion /Ioff ratio of 50 and a subthreshold slope of 145 mV/decade can be obtained with a supply voltage of 0.25 V. This represents a significant progress towards solid-state integration of graphene electronics, but not yet sufficient for digital applications.

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